Bradley A. Minch
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“Single-Cell Recording of Vesicle Release from Human Neuroblastoma Cells Using 1024-ch Monolithic CMOS Bioelectronics,” K. A. White, G. Mulberry, J. Smith, M. Lindau, B. A. Minch, K. Sugaya, and B. N. Kim, IEEE Transactions on Biomedical Circuits and Systems, vol. 12, no. 6, pp. 1345-1355, 2018.
“A Bidirectional-Current CMOS Potentiostat for Fast-Scan Cyclic Voltammetry Detector Arrays,” C. I. Dorta-Quiñones, M. Huang, J. C. Ruelas, J. Delacruz, A. B. Apsel, B. A. Minch, and M. Lindau, IEEE Transactions on Biomedical Circuits and Systems, vol. 12, no. 4, pp. 894-903, 2018.
“Asynchronous Binaural Spatial Audition Sensor With 2×64×4 Channel Output,” S.-C. Liu, A. van Schaik, B. A. Minch, and T. Delbruck, IEEE Transactions on Biomedical Circuits and Systems, vol. 8, no. 4, pp. 453-464, 2014.
“Parallel Recording of Neurotransmitters Release from Chromafin Cells Using a 10×10 CMOS IC Potentiostat Array With On-Chip Working Electrodes,” B. N. Kim, A. D. Herbst, S. J. Kim, B. A. Minch, and M. Lindau, Biosensors and Bioelectronics, vol. 41, pp. 736-744, 2013.
“Post-CMOS Fabrication of Working Electrodes for On-Chip Recordings of Transmitter Release,” S. Ayers, K. Berberian, K. D. Gillis, M. Lindau, and B. A. Minch, IEEE Transactions on Biomedical Circuits and Systems, vol. 4, no. 2, pp. 86-92, 2010.
“Implementing the Lorenz Oscillator with Translinear Elements,” K. Odame and B. Minch, Analog Integrated Circuits and Signal Processing, vol. 59, no. 1, pp. 31-41, 2009.
“MOS Translinear Principle for All Inversion Levels,” B. A. Minch, IEEE Transactions on Circuits and Systems II, vol. 55, no. 2, pp. 121-125, 2008.
“Design of a CMOS Potentiostat Circuit for Electrochemical Detector Arrays,” S. Ayers, K. D. Gillis, M. Lindau, and B. A. Minch, IEEE Transactions on Circuits and Systems I, vol. 54, no. 4, pp. 736-744, 2007.
“The Translinear Principle: A General Framework for Implementing Chaotic Oscillators,” K. M. Odame and B. A. Minch, International Journal of Bifurcation and Chaos, vol. 15, no. 8, pp. 2559-2568, 2005.
“Integration of Chemical Sensing and Electrowetting Actuation on Chemoreceptive Neuron MOS (CνMOS) Transistors,” N. Y. Shen, Z. Liu, B. C. Jacquot, B. A. Minch, and E. C. Kan, Sensors and Actuators B, vol. 102, no. 1, pp. 35-43, 2004.
“Synthesis of Static and Dynamic Multiple-Input Translinear Element Networks,” B. A. Minch, IEEE Transactions on Circuits and Systems I, vol. 51, no. 2, pp. 409-421, 2004.
“Construction and Transformation of Multiple-Input Translinear Element Networks,” B. A. Minch, IEEE Transactions on Circuits and Systems I, vol. 50, no. 12, pp. 1530-1537, 2003.
“A Physical Compact Model of DG MOSFET for Mixed-Signal Circuit Applications--Part I: Model Description,” G. Pei, W. Ni, A. V. Kammula, B. A. Minch, and E. C.-C. Kan, IEEE Transactions on Electron Devices, vol. 50, no. 10, pp. 2135-2143, 2003.
“Charge-Based Chemical Sensors: A Neuromporphic Approach With Chemoreceptive Neuron MOS (CνMOS) Transistors,” N. Y.-M. Shen, Z. Liu, C. Lee, B. A. Minch, and E. C.-C. Kan, IEEE Transactions on Electron Devices, vol. 50, no. 10, pp. 2171-2178, 2003.
“Hysteretic Threshold Logic and Quasi-Delay Insensitive Asynchronous Design,” M. Neidengard and B. A. Minch, IEEE Transactions on Circuits and Systems I, vol. 48, no. 10, pp. 1423-1428, 2002.
“Silicon Synaptic Adaptation Mechanisms for Homeostatis and Contrast Gain Control,” S.-C. Liu and B. A. Minch, IEEE Transactions on Neural Networks, vol. 13, no. 6, pp. 1497-1503, 2002.
“Multiple-Input Translinear Element Log-Domain Filters,” B. A. Minch, IEEE Transactions on Circuits and Systems II, vol 48, no. 1, pp. 29-36, 2001.
“Multiple-Input Translinear Element Networks,” B. A. Minch, P. Hasler, and C. Diorio, IEEE Transactions on Circuits and Systems II, vol. 48, no. 1, pp. 20-28, 2001.
“An Autozeroing Floating-Gate Amplifier,” P. Hasler, B. A. Minch, and C. Diorio, IEEE Transactions on Circuits and Systems II, vol. 48, no. 1, pp. 74-82, 2001.
“A Second-Order Section Built from Autozeroing Floating-Gate Amplifiers,” P. Hasler, T. Stanford, and B. A. Minch, IEEE Transactions on Circuits and Systems II, vol. 48, no. 1, pp. 116-120, 2001.
“A CMOS Programmable Analog Memory Cell Array Using Floating-Gate Circuits,” R. R. Harrison, J. A. Bragg, P. Hasler, B. A. Minch, and S. DeWeerth, IEEE Transactions on Circuits and Systems II, vol. 48, no. 1, pp. 4-11, 2001.
“Impact Ionization and Hot-Electron Injection Derived Consistently from Boltzmann Transport,” P. Hasler, A. G. Andreou, C. Diorio, B. A. Minch, and C. A. Mead, VLSI Design, vol. 8, no. 1-4, pp. 455-461, 1998.
“A Floating-Gate MOS Learning Array With Locally Computed Weight Updates,” C. Diorio, P. Hasler, B. A. Minch, and C. A. Mead, IEEE Transactions on Electron Devices, vol. 44, no. 12, pp. 2281-2289, 1997.
“A Complementary Pair of Four-Terminal Silicon Synapses,” C. Diorio, P. Hasler, B. A. Minch, and C. A. Mead, Analog Integrated Circuits and Signal Processing, vol. 13, no. 1-2, pp. 153-166, 1997.
“A Single-Transistor Silicon Synapse,” C. Diorio, P. Hasler, B. A. Minch, and C. Mead, IEEE Transactions on Electron Devices, vol. 43, no. 11, pp. 1972-1980, 1996.
“Translinear Circuits Using Subthreshold Floating-Gate MOS Transistors,” B. A. Minch, C. Diorio, P. Hasler, and C. A. Mead, Analog Integrated Circuits and Signal Processing, vol. 9, no. 2, pp. 167-179, 1996.
“RATGRAPH: Computer Graphing of Rational Functions,” B. A. Minch, Journal of Computers in Mathematics and Science Teaching, vol. 6, no. 3, pp. 51-54, 85-86, 1987.
Page maintained by Bradley A. Minch – Last modified January 7, 2019